• Joined on 2025-12-31
padreug pushed to v2-bitspire at aiolabs/satmachineadmin 2026-05-26 21:28:53 +00:00
ecf432c6a0 feat(v2)(ui): tx_type chip in operator settlements table (S8 UI)
padreug opened issue aiolabs/satmachineadmin#27 2026-05-26 21:24:07 +00:00
opt-in public publishing — fleet metadata + heartbeats (post-launch)
padreug pushed to v2-bitspire at aiolabs/satmachineadmin 2026-05-26 21:21:39 +00:00
eca6e961b7 feat(v2): wire cash-in routing — direction discriminator + DCA skip
dcd08748a7 revert(v2): drop NIP-78 fleet publishing (privacy by default)
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padreug commented on issue aiolabs/satmachineadmin#17 2026-05-26 20:30:26 +00:00
S3 — NIP-57-style signed settlement receipts (preimage attestation)

2026-05-26 — producer-side issue filed at aiolabs/lnbits#22

padreug pushed to v2-bitspire at aiolabs/satmachineadmin 2026-05-26 20:24:47 +00:00
e13178d3ac feat(v2): route nostr_publish signing through lnbits#17 signer abstraction (hybrid)
padreug opened issue aiolabs/events#23 2026-05-26 18:38:04 +00:00
Migrate Nostr publishing off account.prvkey → use resolve_signer (pre-cascade prerequisite for lnbits#17)
padreug opened issue aiolabs/tasks#3 2026-05-26 18:37:58 +00:00
Migrate Nostr publishing off account.prvkey → use resolve_signer (pre-cascade prerequisite for lnbits#17)
padreug opened issue aiolabs/restaurant#11 2026-05-26 18:37:29 +00:00
Migrate Nostr publishing off account.prvkey → use resolve_signer (pre-cascade prerequisite for lnbits#17)
padreug pushed to v2-bitspire at aiolabs/satmachineadmin 2026-05-26 18:29:21 +00:00
131ff92aa8 feat(v2): publish operator-signed kind:30078 fleet roster + per-machine config (S4)
padreug closed issue aiolabs/satmachineadmin#18 2026-05-26 18:28:54 +00:00
S4 — NIP-78 per-machine config + fleet roster cross-check
padreug commented on issue aiolabs/satmachineadmin#18 2026-05-26 18:28:50 +00:00
S4 — NIP-78 per-machine config + fleet roster cross-check

Shipped on v2-bitspire at commit 131ff92. Builds on the canonical-vocabulary commit d717a6e from earlier today.

padreug pushed to v2-bitspire at aiolabs/satmachineadmin 2026-05-26 18:11:55 +00:00
d717a6e214 refactor(v2): canonical sat-amount vocabulary + delete Lamassu-era reverse-derivation
padreug commented on issue aiolabs/satmachineadmin#22 2026-05-26 16:49:58 +00:00
S8 — Wire cash-in path (LNURL-withdraw outbound + naming hygiene)

2026-05-26 — fold in unique content from closed #23

padreug commented on issue aiolabs/satmachineadmin#24 2026-05-26 09:24:04 +00:00
Ingest kind:30078 ATM status beacons into dca_telemetry

2026-05-26 — coordinate with S4 (#18) on kind:30078 usage

padreug commented on issue aiolabs/satmachineadmin#20 2026-05-26 09:23:49 +00:00
S6 — Roster-gated auto-account-from-npub + rate limit (LNbits-side)

2026-05-26 — status sync against lnbits-side trackers

padreug commented on issue aiolabs/satmachineadmin#17 2026-05-26 09:23:34 +00:00
S3 — NIP-57-style signed settlement receipts (preimage attestation)

2026-05-26 — ATM-side prerequisite is now ready

padreug commented on issue aiolabs/satmachineadmin#11 2026-05-26 09:23:33 +00:00
v2 follow-up: review-cycle findings (HIGH/MEDIUM/NITS) after fix bundle 1

2026-05-26 — fix bundles 2 + 3 + H6 status update

padreug closed issue aiolabs/satmachineadmin#23 2026-05-26 09:23:31 +00:00
S8 — Wire cash‑in path (LNURL‑withdraw outbound) into settlements
padreug commented on issue aiolabs/satmachineadmin#23 2026-05-26 09:23:31 +00:00
S8 — Wire cash‑in path (LNURL‑withdraw outbound) into settlements

Closing as duplicate of #22. Both filed within ~10 minutes on 2026-05-15 with the same scope (G10 cash-in path + naming hygiene).

padreug closed issue aiolabs/satmachineadmin#12 2026-05-26 09:23:30 +00:00
Future: ATM ↔ operator pairing via seed-URL + WalletSharePermission (+ NIP-46 bunker deep-dive)